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NCP345 Overvoltage Protection IC
The NCP345 overvoltage protection circuit (OVP) protects sensitive electronic circuitry from overvoltage transients and power supply faults when used in conjunction with an external P-channel FET. The device is designed to sense an overvoltage condition and quickly disconnect the input voltage supply from the load before any damage can occur. The OVP consists of a precise voltage reference, a comparator with hysteresis, control logic, and a MOSFET gate driver. The OVP is designed on a robust BiCMOS process and is intended to withstand voltage transients up to 30 V. The device is optimized for applications that have an external AC/DC adapter or car accessory charger to power the product and/or recharge the internal batteries. The nominal overvoltage threshold is 6.85 V so it is suitable for single cell Li-Ion applications as well as 3/4 cell NiCD/NiMH applications.
Features
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THIN SOT-23-5 SN SUFFIX CASE 483
5 1
PIN CONNECTIONS & MARKING DIAGRAM
OUT 1 GND CNTRL 2 3 5 VCC RADAYWG G
* * * * * * * * *
Overvoltage Turn-Off Time of less than 1.0 msec Accurate Voltage Threshold of 6.85 V (nominal) Undervoltage Lockout Protection CNTRL Input Compatible with 1.8 V Logic Levels Pb-Free Package is Available
4
IN
Typical Applications
Cellular Phones Digital Cameras Portable Computers and PDAs Portable CD and other Consumer Electronics
(Top View) RAD = Specific Device Code A = Assembly Location Y = Year W = Work Week G = Pb-Free Package (Note: Microdot may be in either location)
ORDERING INFORMATION
Device NCP345SNT1 NCP345SNT1G Package SOT-23-5 SOT-23-5 (Pb-Free) Shipping 3000 / Tape & Reel (7 inch Reel)
For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. Schottky Diode
AC/DC Adapter or Accessory Charger VCC IN + - Vref NCP345 GND CNTRL Undervoltage Lock Out
P-CH
+ Logic FET Driver C1 OUT LOAD
Microprocessor port Note: This device contains 89 active transistors
Figure 1. Simplified Application Diagram
(c) Semiconductor Components Industries, LLC, 2006
1
March, 2006 - Rev. 6
Publication Order Number: NCP345/D
NCP345
VCC (5)
IN (4)
VCC
Pre- regulator R1
V5
R3 + COMP - R2 R4 + UVLO - LOGIC BLOCK
ON/OFF
VCC OUT
OUT (1)
DRIVER
Bandgap Reference CNTRL (3)
GND (2)
Figure 2. Detailed Block Diagram
PIN FUNCTION DESCRIPTIONS
Pin # 1 Symbol OUT Pin Description This signal drives the gate of a P-channel MOSFET. It is controlled by the voltage level on IN or the logic state of the CNTRL input. When an overvoltage event is detected, the OUT pin is driven to within 1.0 V of VCC in less than 1.0 msec provided that gate and stray capacitance is less than 12 nF. Circuit Ground This logic signal is used to control the state of OUT and turn-on/off the P-channel MOSFET. A logic High results in the OUT signal being driven to within 1.0 V of VCC which disconnects the FET. If this pin is not used, the input should be connected to ground. This pin senses an external voltage point. If the voltage on this input rises above the overvoltage threshold (VTH), the OUT pin will be driven to within 1.0 V of VCC, thus disconnecting the FET. The nominal threshold level is 6.85 V and this threshold level can be increased with the addition of an external resistor between IN and VCC. Positive Voltage supply. If VCC falls below 2.8 V (nom), the OUT pin will be driven to within 1.0 V of VCC, thus disconnecting the P-channel FET.
2 3
GND CNTRL
4
IN
5
VCC
TRUTH TABLE
IN Vth >Vth CNTRL L H L H OUT GND VCC VCC VCC
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NCP345
ABSOLUTE MAXIMUM RATINGS (TA = 25C unless otherwise noted.)
Rating OUT voltage to GND Input and CNTRL pin voltage to GND VCC Maximum Range Maximum Power Dissipation at TA = 85C Thermal Resistance Junction to Air Junction Temperature Operating Ambient Temperature VCNTRL Operating Voltage Storage Temperature Range ESD performance (HBM){ Pin 1 4 3 5 - - - - 3 - all Symbol VO Vinput VCNTRL VCC(max) PD RqJA TJ TA - Tstg - Min -0.3 -0.3 -0.3 -0.3 - - - -40 0 -65 2.5 Max 30 30 13 30 0.216 300 150 85 5.0 150 - Unit V V V W C/W C C V C kV
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. { Human body model (HBM): MIL STD 883C Method 3015-7, (R = 1500 ohms, C = 100 pf, F = 3 pulses delay 1 s).
ELECTRICAL CHARACTERISTICS
(For typical values TA = 25C, for min/max values TA = -40C to +85C, VCC = 6.0 V, unless otherwise noted.) Characteristic VCC Operating Voltage Range Supply Current (ICC + IInput; VCC = 6.0 V Steady State) Input Threshold (VInput connected to VCC; VInput increasing) Input Hysteresis (VInput connected to VCC; VInput decreasing) Input Impedance (Input = VTh) CNTRL Voltage High CNTRL Voltage Low CNTRL Current High (Vih = 5.0 V) CNTRL Current Low (Vil = 0.5 V) Undervoltage Lockout (VCC decreasing) Output Sink Current (VCC < VTh, VOUT = 1.0 V) Output Voltage High (VCC = Vin = 8.0 V; ISource = 10 mA) Output Voltage High (VCC = Vin = 8.0 V; ISource = 0.25 mA) Output Voltage High (VCC = Vin = 8.0 V; ISource = 0 mA) Output Voltage Low (Input < 6.5 V; ISink = 0 mA; VCC = 6.0 V, CNTRL = 0 V) Turn ON Delay - Input (VInput connected to VCC; VInput step down signal from 8.0 to 6.0 V; measured to 50% point of OUT)* Turn OFF Delay - Input (VInput connected to VCC; VInput step up signal from 6.0 to 8.0 V; CL = 12 nF Output > VCC-1.0 V) Turn ON Delay - CNTRL (CNTRL step down signal from 2.0 to 0.5 V; measured to 50% point of OUT)* Turn OFF Delay - CNTRL (CNTRL step up signal from 0.5 to 2.0 V; CL = 12 nF Output > VCC-1.0 V) *Turn ON Delay is guaranteed by design. Symbol VCC(opt) - VTh VHyst Rin Vih Vil Iih Iil VLock ISink Voh Pin 5 4,5 4 6.65 4 4 3 3 3 3 3 1 1 50 70 1.5 - - - 2.5 10 VCC-1.0 VCC-0.25 VCC-0.1 - - - - - 6.85 100 150 - - 95 10 2.8 33 - - - - 0.5 - 1.0 7.08 200 - - 0.5 200 20 3.0 50 - - 0.1 10 1.0 10 2.0 mV kW V V mA mA V mA V Min 3.0 - Typ 4.8 0.75 Max 25 1.0 Unit V mA V
Vol TON IN TOFF IN TON CT TOFF CT
1 1 1 1 1
V msec msec msec msec
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NCP345
7.05 7.00 Sink Current (mA) -25 -10 5 20 35 50 65 80 95 6.95 Voltage (V) 6.90 6.85 6.80 6.75 6.70 -40 50 45 40 35 30 25 20 15 10 -40 -25 -10 5 20 35 50 65 80 95
Ambient Temperature (C)
Ambient Temperature (C)
Figure 3. Typical Vth Threshold Variation vs. Temperature
1.0
Figure 4. Typical OUT Sink Current vs. Temperature Vin t Vth, Vout + 1 V
0.9 I supply (mA)
0.8
0.7
0.6
0.5 -40
-25
-10
5
20
35
50
65
80
95
Temperature (C)
Figure 5. Typical Supply Current vs. Temperature Icc ) Iin, VCC + 6 V
2 1 CNTRL Voltage (V) Voltage (V) 0 6 4 2 0 T = 25C 50 100 150 200 250 300 350 400 450 500 Time (nsec) VLOAD = 50 W MOSFET = MGSF3441 VLOAD
2 CNTRL 1 0 6 4 2 0
VLOAD = 50 W MOSFET = MGSF3441
VLOAD
T = 25C 5 10 15 20 25 30 35 40 45 50
Time (msec)
Figure 6. Typical Turn-off Time CNTRL to VLOAD
Figure 7. Typical Turn-on Time CNTRL to VLOAD
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NCP345 APPLICATION INFORMATION
Schottky Diode
AC/DC Adapter or Accessory Charger VCC IN Zener Diode (optional) + - Vref NCP345 GND CNTRL Microprocessor port Undervoltage Lock Out Logic FET Driver
P-CH
Zener Diode OUT (optional)
+ C1 LOAD
Figure 8. Introduction
In many electronic products, an external AC/DC wall adapter is used to convert the AC line voltage into a regulated DC voltage or a current limited source. Line surges or faults in the adapter may result in overvoltage events that can damage sensitive electronic components within the product. This is becoming more critical as the operating voltages of many integrated circuits have been lowered due to advances in sub-micron silicon lithography. In addition, portable products with removable battery packs pose special problems since the pack can be removed at any time. If the user removes a pack in the middle of charging, a large transient voltage spike can occur which can damage the product. Finally, damage can result if the user plugs in the wrong adapter into the charging jack. The challenge of the product designer is to improve the robustness of the design and avoid situations where the product can be damaged due to un-expected, but unfortunately, likely events that will occur as the product is used.
Circuit Overview
To address these problems, the protection system above has been developed consisting of the NCP345 Over Voltage Protection IC and a P-channel MOSFET switch such as the MGSF3441. The NCP345 monitors the input voltage and will not turn on the MOSFET unless the input voltage is within a safe operating window that has an upper limit of 7.05 V. A zener diode can be placed in parallel to the load to provide for secondary protection during the brief time that it takes for the NCP345 to detect the overvoltage fault and disconnect the MOSFET. The decision to use this secondary diode is a function of the charging currents expected, load capacitance across the battery, and the desired protection
voltage by analyzing the dV/dT rise that occurs during the brief time it takes to turn-off the MOSFET. For battery powered applications, a low-forward voltage Schottky diode such as the MBRM120LT3 can be placed in series with the MOSFET to block the body diode of the MOSFET and prevent shorting the battery out if the input is accidentally shorted to ground. This provides additional voltage margin at the load since there is a small forward drop across this diode that reduces the voltage at the load. When the protection circuit turns off the MOSFET, there can be a sudden rise in the input voltage of the device. This transient can be quite large depending on the impedance of the supply and the current being drawn from the supply at the time of an overvoltage event. This inductive spike can be clamped with a zener diode from IN to ground. This diode breakdown voltage should be well above the worst case supply voltage provided from the AC/DC adapter or Cigarette Lighter Adapter (CLA), since the zener is only intended to clamp the transient. The NCP345 is designed so that the IN and VCC pin can safely protect up to 25 V and withstand transients to 30 V. Since these spikes can be very narrow in duration, it is important to use a high bandwidth probe and oscilloscope when prototyping the product to verify the operation of the circuit under all the transient conditions. A similar problem can result due to contact bounce as the DC source is plugged into the product. For portable products it is normal to have a capacitor to ground in parallel with the battery. If the product has a battery pack that is easily removable during charging, this scenario should be analyzed. Under that situation, the charging current will go into the capacitor and the voltage may rise rapidly depending on the capacitor value, the charging current and the power supply response time.
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NCP345
Normal Operation
Figure 1 illustrates a typical configuration. The external adapter provides power to the protection system so the circuitry is only active when the adapter is connected. The OVP monitors the voltage from the charger and if the voltage exceeds a nominal voltage of 6.85 V, the OUT signal drives the gate of the MOSFET to within 1.0 V of VCC, thus turning off the FET and disconnecting the source from the load. The nominal time it takes to drive the gate to this state is 400 nsec (1.0 usec maximum for gate capacitance of < 12 nF). Typical turn off performance using the CNTRL input can be seen in Figure 6. The CNTRL input can also be used to interrupt charging and allow the microcontroller to measure the cell voltage under a normal condition to get a more accurate measure of the battery voltage. Once the over voltage is removed, the NCP345 will turn on the MOSFET. The turn on circuitry is designed to turn on the MOSFET more gradually to limit the in-rush current. Typical turn-on
performance is illustrated using the MGSF3441 in Figure 7. This characteristic is a function of the threshold of the MOSFET and will vary depending on the device characteristics such as the gate capacitance. The OVP has an under voltage lockout (UVLO) circuit which disables the gate driver circuit until the UVLO senses that the VCC voltage is above 2.6 V. Once the UVLO has released the gate driver circuit, the OUT signal will stay high until the voltage on the IN is sensed. If the input voltage to IN is less than 6.85 V nominal, then the OUT signal will be driven LOW and the FET will be turned on so the source can be connected to the load. There are three events that will cause the OVP to drive the gate of the FET to a HIGH state. * Voltage on VCC falls below the UVLO threshold * Voltage on IN rises above 6.85 V (nominal) * CNTRL input is driven to a logic High
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NCP345
PACKAGE DIMENSIONS
THIN SOT-23-5 SN SUFFIX CASE 483-02 ISSUE E
NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. MAXIMUM LEAD THICKNESS INCLUDES LEAD FINISH THICKNESS. MINIMUM LEAD THICKNESS IS THE MINIMUM THICKNESS OF BASE MATERIAL. 4. A AND B DIMENSIONS DO NOT INCLUDE MOLD FLASH, PROTRUSIONS, OR GATE BURRS. MILLIMETERS MIN MAX 2.90 3.10 1.30 1.70 0.90 1.10 0.25 0.50 0.85 1.05 0.013 0.100 0.10 0.26 0.20 0.60 1.25 1.55 0_ 10 _ 2.50 3.00 INCHES MIN MAX 0.1142 0.1220 0.0512 0.0669 0.0354 0.0433 0.0098 0.0197 0.0335 0.0413 0.0005 0.0040 0.0040 0.0102 0.0079 0.0236 0.0493 0.0610 0_ 10 _ 0.0985 0.1181
D
5 1 2 4 3
S
B
L G A J C 0.05 (0.002) H K M
DIM A B C D G H J K L M S
SOLDERING FOOTPRINT*
1.9 0.074
0.95 0.037
2.4 0.094 1.0 0.039 0.7 0.028
SCALE 10:1
mm inches
*For additional information on our Pb-Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.
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NCP345
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NCP345/D

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